1. Field of the Invention
The present invention relates to a semiconductor device, and a manufacturing method thereof. More particularly, it relates to a semiconductor device having a MISFET in which an insulating film having a higher dielectric constant than that of a conventional silicon dioxide film is used as a gate insulating film, and a manufacturing method thereof.
2. Description of the Related Art
The technical development in a semiconductor device has been pursued from three viewpoints of an increase in integration, a reduction in electric power consumption, and an increase in speed. Out of these, the reduction in electric power consumption and the increase in speed in the MISFET are the mutually contradictory challenges. For achieving the compatibility therebetween, the reduction in thickness of a gate insulating film exceeding the trend in the prior art has been required. On the other hand, a silicon dioxide film which has been used as a gate insulating film in the prior art has advantages in that it is excellent in interface characteristics with a silicon substrate, and in that it has a large band gap as an insulating film. However, it has a dielectric constant of 3.8 to 3.9. Thus, the film thickness is required to be set at around 3 nm even for meeting the current requirements on the device performances. The film thickness of the insulating film is determined by a necessary channel induced charge amount. The channel induced charge amount Qc is expressed as the following equation:
Qc=Vxc2x7xcex50xc2x7xcex5/t(q/cm2)
where t denotes the gate insulating film thickness, xcex5 denotes the dielectric constant, xcex50 denotes the dielectric constant of vacuum, and V denotes the voltage applied to the gate insulating film. If the insulating film is reduced in film thickness down to 3 nm or less, there is observed a current (direct tunnel current) which flows by directly tunneling in the insulating film between a gate electrode and the silicon substrate. This current is very large. For this reason, it is considered difficult to reduce the film thickness more than now with the silicon dioxide film.
For avoiding this problem, the use of an insulating film having a large dielectric constant xcex5 is effective. The reason for this is that the Qc is proportional to xcex5, and inversely proportional to the film thickness t as apparent from the equation shown above. As the insulating film having a large dielectric constant xcex5, there is known an oxide film of titanium, tantalum, hafnium, zirconium, aluminium, lanthanum, strontium, selenium, or the like. For example, in the paper issued to B. He et al., (1998 International Electron Device Meeting Technical Digest, p.p. 1038-1040), there is described the characteristic of a MIS (metal insulator silicon) structure using a titanium oxide film. There is also described that even an insulating film with a film thickness of 1.1 nm (EOT; Equivalent Oxide Thickness) in terms of the dielectric constant of a silicon dioxide film can also inhibit the direct tunnel current.
Further, in JP-A No.Hei 11-3990, there is described as follows. When a high dielectric constant material is used as a gate insulating film, an increase in gate electric field increases the current leakage, and thereby deteriorates the element characteristics. Further, the overlap between the gate electric field and the drain electric field causes the short channel effect. For avoiding the foregoing problems, there is disclosed the following semiconductor device. In this semiconductor device, a gate insulating film is formed with a shorter length in the gate length direction than that of a gate electrode. A space or a dielectric having a lower dielectric constant than that of the gate insulating film is provided laterally in the gate length direction of the gate insulating film, and in the region, which is sandwiched between the gate electrode and a semiconductor substrate, and in which at least the gate electrode and a diffusion layer overlap on each other as seen from the top.
As described in the paper to B. He et al., when an insulating film having a high dielectric constant such as a titanium oxide film is used, even if the EOT is reduced to 1 nm or less, the physical film thickness of the insulating film is sufficiently large. Therefore, it is possible to inhibit the direct tunnel current. However, this technology has given no consideration to the following fact. Namely, the insulating film having a high dielectric constant is a metal oxide of titanium, tantalum, or the like. Accordingly, incorporation of such a metal into the silicon substrate causes an increase in junction leakage, and the like. In a conventional MISFET formation process, in general, the gate insulating film is left at the time of gate electrode processing, and source and drain regions are formed with an ion implantation method by using this film as a through film for ion implantation. However, if metallic elements are contained in the gate insulating film at this step, it is unavoidable that the metallic elements are introduced into the silicon substrate due to the knock-on effect.
Further, the paper of (IEEE Transaction on Electron Devices, volume 46, Number 7, July 1999, PP. 1537 to 1544) to B. Cheng., et al., indicates as follows. Namely, when a high dielectric constant insulating film is used as a gate insulating film, the device performances are reduced by the fringe effect due to an increase in the capacitance (fringe capacitance) between the gate edge and the source/drain.
Still further, the foregoing prior art described in JP-A No.Hei 11-3990 has given no consideration to the following fact. Namely, in the region in which the gate electrode and the diffusion layer overlap on each other as seen from the top, a space or a dielectric having a lower dielectric constant than that of a gate insulating film is present. Further, no gate insulating film is disposed on top of the diffusion layer. Therefore, it is difficult to achieve a higher speed.
A first object of the present invention is to provide a semiconductor device in which an insulating film having a higher dielectric constant than that of a silicon dioxide is used as a gate insulating film, and which operates at a high speed, and is excellent in short channel characteristics, and driving current, and in which the amount of metallic elements introduced into a silicon substrate is small.
A second object of the present invention is to provide a method for manufacturing a semiconductor device in which an insulating film having a higher dielectric constant than that of a silicon dioxide is used as a gate insulating film, and which operates at a high speed, and is excellent in short channel characteristics, and driving current, and in which the amount of metallic elements introduced into a silicon substrate is small.
In order to attain the first object, a semiconductor device according to one aspect of the present invention has a field effect transistor which includes a semiconductor substrate, a gate insulating film on the semiconductor substrate, and a gate electrode disposed via the gate insulating film on the semiconductor substrate, wherein the gate insulating film is an insulating film having a higher dielectric constant than that of a silicon dioxide film, the end portions in the gate length direction of the gate insulating film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the gate insulating film are positioned in a region in which the gate electrode overlaps with a source region and a drain region in plan configuration.
Further, in order to attain the first object, a semiconductor device according to another aspect of the present invention has a field effect transistor which includes a semiconductor substrate, a gate insulating film on the semiconductor substrate, and a gate electrode disposed via the gate insulating film on the semiconductor substrate, wherein the gate insulating film is an insulating film having a higher dielectric constant than that of a silicon dioxide film, and the end portions in the gate length direction thereof are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and a source region and a drain region of the field effect transistor extend into the underlying portion of the gate insulating film.
In either of the semiconductor devices, the end portions of the gate insulating film are respectively the end portions of the site which is largest in thickness. In other words, when the gate insulating film is made of a plurality of layers, and the positions of respective end portions thereof differ from one another, the inside between the portions positioned most inwardly from the end portions of the gate electrode corresponds to the thickest site of the gate insulating film. Accordingly, the portions are respectively the end portions of the gate insulating film. Further, even when the end portions of the gate insulating film are not perpendicular to the substrate, the portions positioned most inwardly from the end portions of the gate electrode are respectively the end portions thereof.
It is preferable that the end portions in the gate length direction of the gate insulating film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode by 15 nm to 25 nm, respectively. It is preferable that as the gate insulating film, the oxide, the oxynitride, the silicate compound, or the like of at least one metal selected from the group consisting of titanium, tantalum, hafnium, zirconium, aluminium, lanthanum, and strontium is used. Herein, the silicate compound is defined as a compound having a structure in which the oxide of the metal is contained in the dioxide of silicon (SiO2). Further, the dielectric constant of the gate insulating film is preferably up to about 300. The reason for this is as follows: if it exceeds 300, the film thickness of the gate insulating film becomes too large.
When the gate insulating film is made of a plurality of layers, it is possible to adopt a laminated structure in which a layer comprising the oxide of at least one metal selected from the group consisting of titanium, tantalum, hafnium, zirconium, aluminium, lanthanum, and strontium, and under this layer, a layer comprising the silicate compound of the metal are provided.
It is preferable that the source region and the drain region do not contain the metal contained in the insulating film, or contain the metal in a concentration of 1011 atom/cm2 or less. The gate electrode is preferably a metal selected from at least one selected from the group consisting of tungsten, titanium, and molybdenum, or a nitride thereof or a silicide thereof.
Further, in order to attain the second object, a method for manufacturing a semiconductor device according to one aspect of the present invention, includes the steps of: forming an insulating film having a higher dielectric constant than that of a silicon dioxide film on a semiconductor substrate, and forming a conductive film on the insulating film; processing the conductive film into a gate electrode; removing the insulating film having a higher dielectric constant so that the part underlying the gate electrode is left, and the end portions of the residual part are positioned inwardly of the end portion on the side on which a source region is to be formed and the end portion on the side on which a drain region is to be formed of the gate electrode, and thereby allowing the residual part to serve as a gate insulating film; forming a second insulating film having a lower dielectric constant than that of the gate insulating film at least laterally in the gate length direction of the gate electrode, and on the semiconductor substrate; and implanting a dopant into the substrate through the second insulating film by an ion implantation method to form the source region and the drain region, and allowing the source region and the drain region to extend into the underlying portion of the gate insulating film.
Still further, in order to attain the second object, a method for manufacturing a semiconductor device according to another aspect of the present invention includes the steps of: forming a first insulating film having a higher dielectric constant than that of a silicon dioxide film on a semiconductor substrate, forming a second insulating film having a higher dielectric constant than that of the first insulating film on the first insulating film, and forming a conductive film on the second insulating film; processing the conductive film into a gate electrode; removing the second insulating film so that the part underlying the gate electrode is left, and the end portions of the residual part are positioned inwardly of the end portion on the side on which a source region is to be formed and the end portion on the side on which a drain region is to be formed of the gate electrode, and thereby allowing the residual part to serve as a gate insulating film; and implanting a dopant into the substrate through the first insulating film by an ion implantation method to form the source region and the drain region, and allowing the source region and the drain region to extend into the underlying portion of the gate insulating film.
It is preferable that the insulating film having a higher dielectric constant is formed in amorphous state, and the removal of the insulating film having a higher dielectric constant is partially performed by dry etching, and then further performed by wet etching. Further, it is preferable that the insulating film having a higher dielectric constant is crystallized after wet etching. Still further, the removal of the insulating film having a higher dielectric constant is performed such that the end portions of the residual part are positioned inwardly from the respective end portions on the source region side and on the drain region side of the gate electrode by 15 nm to 25 nm, respectively. The residual part serves as the gate insulating film, and hence each of the end portions thereof has the same meaning as that of each of the end portions of the gate insulating film described above.
The implantation of the dopant can be performed by an oblique ion implantation method. The materials for the gate insulating film and the materials for the gate electrode are the same as described above. Further, it is possible that the gate electrode is a polysilicon, and a plurality of the gate electrodes have mutually different work functions by using different substances for the ion implantation from one gate electrode to another. The preferred materials and the like of the gate insulating film and the gate electrode are the same as described above.